/**
 * Copyright 2022 Huawei Technologies Co., Ltd
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_MUX_BASE_GPU_KERNEL_H_
#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_MUX_BASE_GPU_KERNEL_H_

#include "plugin/device/gpu/kernel/nccl/nccl_gpu_kernel.h"

namespace mindspore {
namespace kernel {
static const char MUX_RECV_RANK_ADDR_PREFIX[] = "MUX_RECV_RANK_";
static const char ACTIVATION_OK[] = "1";
static const char ACTIVATE[] = "activate";
class MuxBaseGpuKernel : public NcclGpuKernelMod {
 public:
  MuxBaseGpuKernel() = default;
  ~MuxBaseGpuKernel() = default;

 protected:
  // The goal of this source rank id is to communicate between consecutive mux recv/send kernels, the communication
  // pattern is as follows:
  // ***************************************************
  // (mux_send)[sub_graph_1] -> (mux_recv -> mux_send)[sub_graph_2] -> (mux_recv)[sub_graph_1]
  // ***************************************************
  // thus this `src_rank_id_` is to record the rank id of sub_graph_1 and pass this rank value from mux_recv to mux_send
  // of sub_graph_2.
  static int src_rank_id_;
};
}  // namespace kernel
}  // namespace mindspore

#endif  // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_MUX_BASE_GPU_KERNEL_H_
